Developing a Retargetable Compiler: Some Preliminary Results

نویسندگان

  • Elena Panainte
  • Koen Bertels
  • Stamatis Vassiliadis
چکیده

The current paper reports on the first results of building a retargetable compiler for reconfigurable computing. The discussed research is part of a larger project whose main objective is to develop a semi-automatic tool platform for reconfigurable computing supporting a fully integrated design environment. It constitutes the first attempt to provide a workbench that will cover the entire design trajectory of general-purpose augmented processors with reconfigurable computing parts. The scope of the proposed platform regards processors that intend to speed-up single program execution using reconfigurable hardware. Consequently, the Delft Workbench platform targets architectures with single program counters (uni-processors) incorporating reconfigurable co-processing. Based on a particular architectural paradigm we use a SET / EXECUTE function scheduling platform and we provide appropriate modifications to the compiler back-end so that the SET / EXECUTE can be incorporated. Keywords—retargetable compiler, reconfigurable system, IR extension.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Developing a Retargetable Compiler for Mips32k and Arm7tdmi-s

The market of embedded systems is spreading faster than that of information technology. Mostly, the segments of embedded systems are consumer markets, with very short product lifetimes and short market windows. Hence, time-to-market is an important factor. Cutting down the time to market for products that became more and more complex is possible through “re-use”. Another important characteristi...

متن کامل

Automatic C Compiler Generation from Architecture Description Language ISAC

This paper deals with retargetable compiler generation. After an introduction to applicationspecific instruction set processor design and a review of code generation in compiler backends, ISAC architecture description language is introduced. Automatic approach to instruction semantics extraction from ISAC models which result is usable for backend generation is presented. This approach was succe...

متن کامل

Beyond tool-specific machine descriptions

When developing software for embedded systems, the set of essential tools includes a compiler and an instruction set simulator. Since software and hardware are often designed in parallel, the tools must be easily adaptable to the changing target architecture. For the compiler, its back-end (the code generator) must be retargetable. Abstraction from the target machine is the key to an automated ...

متن کامل

A Retargetable Compiler of VLIW ASIP for Media Signal Processing

In the last decade extensive researches have been carried out in ASIP (Application Specific Instruction Processor) design field. One of the key steps in ASIP design is code generation by a retargetable compiler. In this paper we describe our experience in implementing a retargetable compiler for VLIW ASIP based on ORC (Open Research Compiler) framework. Orienting towards a new register file acc...

متن کامل

Cost-minimization in register assignment for retargetable compilers

A method of register assignment in optimizing retargetable compilers is described. The design of the PACK register assignment system is presented, and it is shown how PACK functions in compilers built with the Production Quality Compiler Compiler technology.

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2002